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20080195877
CONSERVING POWER BY REDUCING VOLTAGE SUPPLIED TO AN INSTRUCTION-PROCESSING PORTION OF A PROCESSOR

1. An instruction-processing system, comprising:

a core with instruction-processing circuitry;

an area coupled to the core;

a core voltage provided to the core; and

an area voltage provided to the area;

wherein in a normal operation mode:

a clock signal to the core is active;

the core voltage is sufficient to maintain state information of the instruction processing circuitry; and

the area voltage is sufficient to maintain the data stored in the area;

wherein in a first power-saving mode:the clock signal to the core is inactive;the core voltage is sufficient to maintain the state information of the instruction-processing circuitry; and

the area voltage is sufficient to maintain the data stored in the area; and

wherein in a second power-saving mode:the clock signal to the core is inactive;the core voltage is less than the first value; and

the area voltage is sufficient to maintain the data stored in the area.